Title :
Noise analysis of the input matching circuits for UWB Low Noise Amplifiers
Author :
Mohan, Ned ; Vaithianathan, V.
Author_Institution :
Dept. of VLSI Design, SSN Coll. Of Eng., Chennai, India
Abstract :
In this paper, Ultra Wide Band (UWB) Low Noise Amplifier (LNA) with different input matching networks, one with current reuse networks, the other with common gate and another with filter stage are presented. The shunt-series feedback is used to improve the bandwidth, noise figure, input matching and linearity. The proposed LNAs are designed using 90nm CMOS technology and its various performance parameters are analyzed using Agilent ADS simulator. The LNA with the capacitive current reuse circuit, achieves the least Noise Figure of 1.6dB. The reverse isolation (S12) is less than -50 dB for all the three LNA topologies. The maximum power gain (S21) of 31 dB is obtained by using resistive current reuse technique and the NF in the range of 1.6-4 dB is measured.
Keywords :
CMOS analogue integrated circuits; feedback amplifiers; low noise amplifiers; matched filters; ultra wideband technology; Agilent ADS simulator; CMOS technology; LNA topology; UWB amplifier; bandwidth; capacitive current reuse circuit; common gate; current reuse network; filter stage; gain 31 dB; input matching circuit; low noise amplifier; maximum power gain; noise analysis; noise figure; noise figure 1.6 dB; resistive current reuse technique; reverse isolation; shunt-series feedback; size 90 nm; ultrawide band amplifier; Bandwidth; Gain; Impedance; Impedance matching; Logic gates; Noise figure; Common Gate; Current-Reuse; Filter stage; Linearity; Noise Figure; Shunt-Series feedback;
Conference_Titel :
Communications and Signal Processing (ICCSP), 2013 International Conference on
Conference_Location :
Melmaruvathur
Print_ISBN :
978-1-4673-4865-2
DOI :
10.1109/iccsp.2013.6577114
