DocumentCode :
629367
Title :
CIC for decimation and interpolation using Xilinx system generator
Author :
Elamaran, V. ; Vaishnavi, R. ; Rozario, A. Maxel ; Joseph, Steffy Maria ; Cherian, Arun
Author_Institution :
Dept. of Electron. & Commun. Eng. (ECE), SASTRA Univ., Thanjavur, India
fYear :
2013
fDate :
3-5 April 2013
Firstpage :
622
Lastpage :
626
Abstract :
In this paper a Cascaded integrated comb (CIC) filter, an optimized class of linear filters such as FIR is implemented for digital up conversion (DUC) and digital down conversion (DDC) for efficient transmission and reception in multirate system. CIC filters are often used for the purpose of reducing sampling rate (decimation) and increasing sampling rate (interpolation). Our work is to show the efficiency of CIC filters over FIR filters in fixed point applications. Single stage CIC filter and multistage CIC filters for interpolation and decimation are realized. Here multirate filter design models for decimation and interpolation are developed using Xilinx system generator. Also multirate filters are further improved by cascading various CIC filter stages.
Keywords :
comb filters; interpolation; sampling methods; CIC filters; DDC; DUC; FIR filters; Xilinx system generator; cascaded integrated comb filter; decimation; digital down conversion; digital up conversion; fixed point applications; interpolation; multirate filter design models; sampling rate; Filtering theory; Finite impulse response filters; Generators; Interpolation; Maximum likelihood detection; Nonlinear filters; CIC filter; FPGA; Xilinx system generator; decimator; interpolator;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications and Signal Processing (ICCSP), 2013 International Conference on
Conference_Location :
Melmaruvathur
Print_ISBN :
978-1-4673-4865-2
Type :
conf
DOI :
10.1109/iccsp.2013.6577129
Filename :
6577129
Link To Document :
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