• DocumentCode
    629665
  • Title

    Differential high speed ultra low-voltage pass transistor boolean logic

  • Author

    Berg, Yngvar

  • Author_Institution
    Dept. of Inf., Univ. of Oslo, Oslo, Norway
  • fYear
    2013
  • fDate
    20-21 June 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper we present high-speed and ultra low-voltage pass transistor. The delay of the proposed pass transistors are less than 6% of conventional CMOS pass transistors operating at supply voltages down to 200mV. The pass transistor logic presented can be used to implement low-voltage high-speed serial adders. The simulated data provided is obtained using Cadence and 90nm TSMC CMOS process.
  • Keywords
    CMOS logic circuits; MOSFET; adders; circuit simulation; low-power electronics; CMOS pass transistor; Cadence data simulation; TSMC CMOS process; delay; differential high speed ultralow-voltage pass transistor Boolean logic circuit; low-voltage high-speed serial adder; CMOS integrated circuits; Delays; Logic gates; MOS devices; Standards; Threshold voltage; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Faible Tension Faible Consommation (FTFC), 2013 IEEE
  • Conference_Location
    Paris
  • Print_ISBN
    978-1-4673-6105-7
  • Type

    conf

  • DOI
    10.1109/FTFC.2013.6577762
  • Filename
    6577762
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=629665