DocumentCode :
629976
Title :
A 0.9V low-power 0.4–6GHz linear SDR receiver in 28nm CMOS
Author :
Borremans, Jonathan ; van Liempd, B. ; Martens, Ewout ; Sungwoo Cha ; Craninckx, Jan
Author_Institution :
imec, Leuven, Belgium
fYear :
2013
fDate :
12-14 June 2013
Abstract :
Linear receivers typically use higher than standard supply voltages and consume significant power. This work presents the first 28nm CMOS multistandard receiver. Operating at just 0.9V, it tolerates 0dBm blockers and achieves +5dBm OB-IIP3, at less than 40mW and operating up to 6GHz.
Keywords :
CMOS integrated circuits; UHF integrated circuits; microwave integrated circuits; radio receivers; software radio; CMOS multistandard receiver; frequency 0.4 GHz to 6 GHz; low-power linear SDR receiver; size 28 nm; software defined radio; voltage 0.9 V; CMOS integrated circuits; Harmonic analysis; Mixers; Noise measurement; Power harmonic filters; Radio frequency; Receivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits (VLSIC), 2013 Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4673-5531-5
Type :
conf
Filename :
6578641
Link To Document :
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