Title :
A 66dB SNDR 15MHz BW SAR assisted ΔΣ ADC in 22nm tri-gate CMOS
Author :
Lee, C.C. ; Alpman, Erkan ; Weaver, Sam ; Cho-Ying Lu ; Rizk, J.
Author_Institution :
Adv. Design, Intel Corp., Hillsboro, OR, USA
Abstract :
A discrete-time ΔΣ ADC that utilizes an 8b SAR quantizer with a 4b feedback DAC is presented. The 4 MSBs of the quantizer are fed-back for Δ operation while a digital filter post-processes the full 8b and improves the resolution. The ΔΣ modulator has a single stage 2nd order feed-forward topology with Fs=240MHz and OSR=8. The ADC achieves 66dB SNDR, 15MHz bandwidth, and consumes 12.7mW power This ADC is designed in Intel´s tri-gate 22nm CMOS process.
Keywords :
CMOS digital integrated circuits; digital filters; feedforward; sigma-delta modulation; SAR quantizer; bandwidth 15 MHz; digital filter; discrete time sigma delta ADC; feedback DAC; feedforward topology; power 12.7 mW; sigma delta modulator; size 22 nm; tri gate CMOS process; Digital filters; Energy resolution; Modulation; Noise; Prototypes; Quantization (signal); Signal resolution;
Conference_Titel :
VLSI Circuits (VLSIC), 2013 Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4673-5531-5
