Title :
A 12-bit, 200-MS/s, 11.5-mW pipeline ADC using a pulsed bucket brigade front-end
Author :
Dolev, Noam ; Kramer, Michel ; Murmann, Boris
Author_Institution :
Stanford Univ., Stanford, CA, USA
Abstract :
A high-speed, low-power pipeline ADC is realized by replacing the front-end residue amplifiers with pulsed bucket brigade circuitry and compensating for the introduced errors using digital linearization. The ADC is implemented in 65-nm CMOS and occupies 0.26 mm2. It operates at 200 MS/s, consumes 11.5 mW from a 1-V supply and achieves an SNDR of 65 dB at low input frequencies and 57.6 dB near Nyquist. The corresponding SNDR-based Schreier FOM is 164.5 dB and 157 dB, respectively.
Keywords :
CMOS integrated circuits; amplifiers; analogue-digital conversion; high-speed integrated circuits; low-power electronics; CMOS; Nyquist; SNDR-based Schreier FOM; digital linearization; front-end residue amplifiers; low-power pipeline ADC; power 11.5 mW; pulsed bucket brigade circuitry; pulsed bucket brigade front-end; size 65 nm; voltage 1 V; word length 12 bit; CMOS integrated circuits; Calibration; Capacitors; Gain; Pipelines; Semiconductor device measurement; Switches;
Conference_Titel :
VLSI Circuits (VLSIC), 2013 Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4673-5531-5
