DocumentCode :
631071
Title :
Simulation of CTCS-3 protocol with temporal logic programming
Author :
Peng Zhang ; Zhenhua Duan ; Cong Tian
Author_Institution :
Inst. of Comput. Theor. & Technol., Xidian Univ., Xi´an, China
fYear :
2013
fDate :
27-29 June 2013
Firstpage :
72
Lastpage :
77
Abstract :
This paper presents an approach to simulate and verify the CTCS-3 (Chinese Train Control System 3) protocol with a Modeling, Simulation and Verification Language (MSVL) which is an executable subset of Projection Temporal Logic (PTL). First, the syntax and semantics of PTL and MSVL are briefly introduced. Then, CTCS-3 protocol is briefly presented and a simplified CTCS-3 protocol described by an MSVL program is given, and the property to be verified is specified by a Propositional Projection Temporal Logic (PPTL) formula. Finally, the simulation is conducted by means of the interpreter of MSVL. A dynamic graph showing behavior of train is depicted. Based on the graph, we can verify whether or not the protocol satisfies the property.
Keywords :
digital simulation; locomotives; logic programming; program verification; railways; CTCS-3 protocol simulation; Chinese Train Control System 3 protocol; MSVL program; PPTL formula; modeling simulation and verification language; propositional projection temporal logic; temporal logic programming; Control systems; Mathematical model; Protocols; Semantics; Simulation; Software packages; Syntactics; CTCS-3 protocol; MSVL; Simulation; Temporal Logic; Verification;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Supported Cooperative Work in Design (CSCWD), 2013 IEEE 17th International Conference on
Conference_Location :
Whistler, BC
Print_ISBN :
978-1-4673-6084-5
Type :
conf
DOI :
10.1109/CSCWD.2013.6580942
Filename :
6580942
Link To Document :
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