Title :
Efficient custom instruction generation based on characterizing of basic blocks
Author :
Guoqiang Liang ; Yuchun Ma ; Kang Zhao ; Jinian Bian
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Abstract :
The application specific instruction-set processor (ASIP) offers better computing performance and efficiency by exploiting a set of specific custom instructions (CI) in the processor. However, traditional approaches suffer from the problem that it costs so much computational resource to enumerate and select the optimal custom instructions. In this paper, instead of generating the custom instructions by enumerating all sub-graphs in the data flow graph, we propose a novel custom instruction generation algorithm based on analyzing the basic blocks (BB) which are the smallest execution units of the program. On the basis of characterizing the logic information and structure of basic blocks, both the identification and selection processes could be more efficient by focusing on the feasible candidates with better benefits. A Maximal Weight Independent Set-based formulation is set up to select the final custom instructions based on the efficient identification of candidate custom instructions with logic information of BBs. The experimental result shows that our algorithm can identify 55% more feasible CIs compared with the previous approach. With efficient identification process, we can finally get better CI designs with about 3.27X performance gain of the whole system.
Keywords :
data flow graphs; instruction sets; program processors; resource allocation; software performance evaluation; ASIP; application specific instruction-set processor; basic block characterization; computational resource; computing efficiency; computing performance; custom instruction generation algorithm; data flow graph; identification process; logic information; maximal weight independent set-based formulation; selection process; subgraph enumeration; Algorithm design and analysis; Benchmark testing; Hardware; Partitioning algorithms; Performance gain; Ports (Computers); Runtime; basic block; custom insturction; reconfigurable processors;
Conference_Titel :
Computer Supported Cooperative Work in Design (CSCWD), 2013 IEEE 17th International Conference on
Conference_Location :
Whistler, BC
Print_ISBN :
978-1-4673-6084-5
DOI :
10.1109/CSCWD.2013.6580946