DocumentCode :
631367
Title :
Hardware/software co-compilation with the Nymble system
Author :
Huthmann, Jens ; Liebig, Bjorn ; Oppermann, Julian ; Koch, Andreas
Author_Institution :
Embedded Syst. & Applic. Group (ESA), Tech. Univ. Darmstadt, Darmstadt, Germany
fYear :
2013
fDate :
10-12 July 2013
Firstpage :
1
Lastpage :
8
Abstract :
The Nymble compiler system accepts C code, annotated by the user with partitioning directives, and translates the indicated parts into hardware accelerators for execution on FPGA-based reconfigurable computers. The interface logic between the remaining software parts and the accelerators is automatically created, taking into account details such as cache flushes and copying of FPGA-local memories to the shared main memory. The system also supports calls from hardware back into software, both for infrequent operations that do not merit hardware area, as well as for using operating system / library services such as memory management and I/O.
Keywords :
field programmable gate arrays; program compilers; shared memory systems; C code; FPGA-based reconfigurable computer; FPGA-local memory; Nymble compiler system; cache flush; hardware accelerator; hardware-software cocompilation; interface logic; library service; memory management; operating system; partitioning directive; shared main memory; Computer architecture; Hardware; Kernel; Microarchitecture; Registers; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013 8th International Workshop on
Conference_Location :
Darmstadt
Print_ISBN :
978-1-4673-6180-4
Type :
conf
DOI :
10.1109/ReCoSoC.2013.6581538
Filename :
6581538
Link To Document :
بازگشت