Analysis of resistance variations and variance-aware read circuit for cross-point ReRAM

Author

Jae-Koo Park ; Sang-Yun Kim ; Jong-Min Baek ; Dong-Jin Seo ; Jung-Hoon Chun ; Kee-Won Kwon

Author_Institution

Coll. of Inf. & Commun. Eng., Sungkyunkwan Univ., Suwon, South Korea

fYear

2013

fDate

26-29 May 2013

Firstpage

112

Lastpage

115

Abstract

An adaptive reference control is proposed to adjust the reference current of current-mode sense amplifier (SA) for optimum read margin along with spatial distribution and temporal drift of the resistance of ReRAM cells. An ADC-based SA for distributed dummy cell is used to examine the distribution data, and binary SA with regulated reference for memory cells provides fast and reliable read in cross-point cell array. The adaptive reference control prevents yield drop due to resistance degradation after 10⁶ times read disturbance. Maximum read speed of disturbed ReRAM is also improved from 50ns to 28.4ns. The circuit is fabricated using 350nm CMOS technology and mounted with 1-Kb HfOx cross-point array to verify the control.

Keywords

CMOS integrated circuits; amplifiers; analogue-digital conversion; current-mode circuits; random-access storage; ADC-based SA; CMOS technology; HfO_x; adaptive reference control; cross-point ReRAM; cross-point cell array; current-mode sense amplifier; distributed dummy cell; memory cells; optimum read margin; reference current; resistance variations; size 350 nm; spatial distribution; storage capacity 1 Kbit; temporal drift; variance-aware read circuit; Arrays; Current measurement; Distribution functions; Electrical resistance measurement; Graphical models; Hafnium compounds; Resistance; ADC-based SA; ReRAM; Reference control;

fLanguage

English

Publisher

ieee

Conference_Titel

Memory Workshop (IMW), 2013 5th IEEE International

Conference_Location

Monterey, CA

Print_ISBN

978-1-4673-6168-2

Type

conf

DOI

10.1109/IMW.2013.6582111

Filename

6582111