DocumentCode :
633850
Title :
Interconnect reliability assurance for circuits with billions of transistors
Author :
Turner, Timothy E.
Author_Institution :
Coll. of Nanoscale Sci. & Eng, Univ. at Albany, Albany, NY, USA
fYear :
2013
fDate :
15-19 July 2013
Firstpage :
149
Lastpage :
152
Abstract :
The small number of atoms involved in a 20nm conductor makes the conductor susceptible to the local variation in stress, grain structure and surrounding dielectric consistency. This leads to a larger variation in the performance of each metal line or via. At the same time, we increase the number of metal lines on a chip. The results is a complex failure distribution that will require design mitigation to accomplish the goals set for the product.
Keywords :
conductors (electric); semiconductor device reliability; transistors; complex distribution; conductor; dielectric consistency; grain structure; interconnect reliability assurance; metal line; size 20 nm; stress variation; transistor; Current density; Electromigration; Metals; Resistance; Semiconductor device measurement; Stress; Timing; Electromigration; ILD TDDB Semiconductor Reliability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2013 20th IEEE International Symposium on the
Conference_Location :
Suzhou
ISSN :
1946-1542
Print_ISBN :
978-1-4799-1241-4
Type :
conf
DOI :
10.1109/IPFA.2013.6599143
Filename :
6599143
Link To Document :
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