DocumentCode :
633857
Title :
A sample preparation technique to reveal the implant profile by TEM for IC failure analysis
Author :
Ming Li ; Chien, Wei-ting Kary ; Shuqing Duan
Author_Institution :
Semicond. Manuf. Int. (Shanghai) Corp., Shanghai, China
fYear :
2013
fDate :
15-19 July 2013
Firstpage :
238
Lastpage :
242
Abstract :
In the TEM image of a MOS device prepared by the traditional TEM sample preparation method, the junction profile cannot be displayed. In this paper, a TEM sample preparation technique was introduced to directly observe the junction profile by TEM. Using this technique, the junction profiles of LDD and Source/Drain of a MOS device can be clearly displayed in the TEM images. To demonstrate the application of this technique in failure analysis, case studies about the implant issue induced device fail were also reported.
Keywords :
MIS devices; failure analysis; integrated circuit reliability; ion implantation; specimen preparation; IC failure analysis; LDD; MOS device; TEM images; implant profile; ion implantation; junction profiles; lightly doped drain; sample preparation technique; source-drain; transmission electron microscope; Analytical models; Decision support systems; Failure analysis; Integrated circuit modeling; Mathematical model; TEM; defect; failure analysis; implant profile; integrated circuit; sample preparation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2013 20th IEEE International Symposium on the
Conference_Location :
Suzhou
ISSN :
1946-1542
Print_ISBN :
978-1-4799-1241-4
Type :
conf
DOI :
10.1109/IPFA.2013.6599160
Filename :
6599160
Link To Document :
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