A novel CMOS image sensor for high speed parallel integral image computation

A novel CMOS image sensor architecture for computing integral image is presented. The proposed circuit reads the image and produces the integral image simultaneously. In the circuit, the image is divided into vertical blocks and integral images of the blocks are computed in parallel. The final integral image is produced using an updating method. To evaluate the performance of the circuit the blob detector implemented in Speeded Up Robust Features (SURF) algorithm is used. In comparison with conventional sequential method, while the final results are similar, the proposed approach is 500 times faster in capturing the integral image of a 160×160 sample image.