An efficiency enhancement technique for CMOS rectifiers with low start-up voltage for UHF RFID tags

A high-efficiency CMOS rectifier with low start-up voltage for ultra-high-frequency (UHF) radio-frequency identification (RFID) applications is presented. To enhance the power conversion efficiency (PCE) of the conventional rectifier when the input voltage (power) is low, appropriate gate-drive voltages for each stage of the rectifier are generated using a chain of auxiliary floating rectifier cells. Floating rectifier cells are optimized to generate shifted versions of the intermediate voltage of each stage to boost the drive voltage of NMOS and PMOS switching transistors and accordingly improve the PCE. The proposed rectifier architecture is designed in a standard 0.13μm CMOS technology. For a 950 MHz RF input and 50 kΩ output load, simulation results show that the rectifier achieves a PCE of 54% for a small input signal with an amplitude of 200 mV (-19 dBm) which is well below the nominal standard threshold voltage of MOS transistors in the technology used.