DocumentCode :
637657
Title :
Technology migration of analogue CMOS circuits using hooke-jeeves algorithm and genetic algorithms in multi-core CPU systems
Author :
Naumowicz, Mariusz ; Melosik, Michal ; Katarzynski, Piotr
Author_Institution :
Comput. Eng., Poznan Univ. of Technol., Poznań, Poland
fYear :
2013
fDate :
20-22 June 2013
Firstpage :
267
Lastpage :
272
Abstract :
In this paper a new approach for technology migration of analogue CMOS circuits is presented. The Hooke-Jeeves algorithm and genetic algorithms, are considered for multi criteria optimization in conjunction with HSPICE simulation software. Their goal is to calculate the values for circuits´ elements for implementation in certain technology of fabrication. The modifications and improvements introduced in generic Hooke-Jeeves algorithm for multi-core CPUs are described. The methodology of migration is presented and verified with a several circuit examples passed between TSMC 0.18 μm and TSMC 90 nm CMOS fabrication processes. The paper is concluded by comparing the migration speed and reliability for the two implemented migration strategies.
Keywords :
CMOS analogue integrated circuits; genetic algorithms; integrated circuit reliability; multiprocessing systems; HSPICE simulation software; Hooke-Jeeves algorithm; TSMC CMOS fabrication process; analogue CMOS circuits; genetic algorithms; migration speed; multicore CPU systems; multicriteria optimization; reliability; size 0.18 mum; size 90 nm; Algorithm design and analysis; CMOS integrated circuits; CMOS technology; Genetic algorithms; Mirrors; Optimization; Transistors; Hooke-Jeeves algorithm; OpenMP; design reuse; genetic algorithms; nanometer technology; technology migration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Mixed Design of Integrated Circuits and Systems (MIXDES), 2013 Proceedings of the 20th International Conference
Conference_Location :
Gdynia
Print_ISBN :
978-83-63578-00-8
Type :
conf
Filename :
6613355
Link To Document :
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