Characterization of transistors fabricated in evolving lapis semiconductor silicon-on-insulator 0.2µm technology

This paper presents the effect SOI detector´s bias voltage has on current-voltage characteristics of different types of transistors (core transistors, io transistors, body floating, sourcetie, body-tie, low/normal/high threshold voltage). Methods of minimizing this effect were presented. Also, the I-V characteristic of transistors utilizing shielding layer (BPW - buried P Well) were measured and presented. This paper shows results of measurements of test transistors fabricated in Lapis Semiconductor SOI 0.2 μm technology.