Self-aligned planar metal double-gate low-temperature polycrystalline-silicon thin-film transistors on glass substrate

Self-aligned planar metal double-gate n-channel (n-ch) and p-channel (p-ch) polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) consisting of an embedded bottom metal gate, a top metal gate fabricated by a self-alignment process, and a lateral poly-Si film with a grain size greater than 2 μm were fabricated on a glass substrate at 550°C. The TFTs are called embedded metal double-gate (E-MeDG) low-temperature (LT) poly-Si TFTs in this paper. The nominal field-effect mobility and its subthreshold slope are, respectively, 530 cm²/Vs and 140 mV/dec for n-ch E-MeDG LT poly-Si TFTs, and 135 cm²/Vs and 150 mV/dec for p-ch TFTs. The performance of the proposed TFTs is discussed and compared with those of metal double-gate LT poly-Si TFTs, in which the bottom metal gate is positioned on a glass substrate, and conventional top-gate LT poly-Si TFTs. The superior performance of the E-MeDG LT poly-Si TFTs will contribute to the fabrication of high-speed, low-power CMOS poly-Si TFT circuits on glass substrates.