• DocumentCode
    640490
  • Title

    IC design of area efficient voltage controlled oscillators for UWB wireless systems in 0.18μm CMOS

  • Author

    Leary, Robert M. O. ; McCarthy, K.G.

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Univ. Coll. Cork, Cork, Ireland
  • fYear
    2012
  • fDate
    28-29 June 2012
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    This paper presents three variations of a fully integrated differential voltage-controlled oscillator (VCO) design for high data rate Ultra Wideband (UWB) communication applications. The Oscillators are implemented in 0.18μm CMOS, and achieve center frequencies of 6.05GHz, 4.24GHz, and 3.2GHz. The tuning ranges are 5.14%, 20.2% and 25.9% with core currents consumed at 3 mA, 3 mA and 4 mA respectively. The phase noise performance is -97 dBc/Hz, -93 dBc/Hz and -117 dBc/Hz respectively at 1 MHz offset. The core areas are relatively small compared to similar work at 0.117 mm2, 0.157 mm2 and 0.136 mm2 respectively. This was achieved using an asymmetric design based on the use of only a single inductor.
  • Keywords
    CMOS integrated circuits; circuit noise; inductors; integrated circuit design; phase noise; ultra wideband communication; voltage-controlled oscillators; CMOS; IC design; UWB communication; UWB wireless system; VCO design; area efficient voltage controlled oscillator; asymmetric design; current 3 mA; current 4 mA; frequency 1 MHz; frequency 3.2 GHz; frequency 4.24 GHz; frequency 6.05 GHz; fully integrated differential voltage-controlled oscillator; high data rate ultra wideband communication; inductor; phase noise performance; size 0.18 mum; tuning range; Oscillator; PLL; Quadrature; UWB; Ultrawideband;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Signals and Systems Conference (ISSC 2012), IET Irish
  • Conference_Location
    Maynooth
  • Electronic_ISBN
    978-1-84919-613-0
  • Type

    conf

  • DOI
    10.1049/ic.2012.0210
  • Filename
    6621189