A fast design for LDPC matrices

Author

Cao, L.V. ; Nguyen, T.D.

Author_Institution

Vietnam Telev. Center, Hanoi, Vietnam

fYear

2012

fDate

12-15 Dec. 2012

Abstract

In this paper, we designed fast structure generator and parity check matrices of Low Density Parity Check (LDPC) codes using a random degree distribution termed as the standard stationary random degree distribution. The achievable Bit Error Ratio (BER) performance of designed codes is improved with the aid of the novel designed matrices. For example, the designed 1/3-rate LDPC(1200,3600) code attains BER ≤ 10^-5 in excess of an E_b/N₀ value of 1.5dB for transmission over the AWGN channel and above 3.5 dB over the uncorrelated Rayleigh channel when using Quadrature Phase-Shift Keying (QPSK) modulation and a maximum of I=20 decoding iterations.

Keywords

matrix algebra; parity check codes; AWGN channel; BER performance; LDPC codes; LDPC matrices; QPSK modulation; bit error ratio performance; fast structure generator design; low density parity check codes; parity check matrices; quadrature phase-shift keying modulation; random degree distribution; standard stationary random degree distribution; uncorrelated Rayleigh channel; Bellows; Bit error rate; Fading; Indexes; Parity check codes; Phase shift keying; EXIT charts; LDPC; QPSK; Regular-LDPC; Standard Stationary Random Degree Distribution;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing and Information Technology (ISSPIT), 2012 IEEE International Symposium on

Conference_Location

Ho Chi Minh City

Print_ISBN

978-1-4673-5604-6

Type

conf

DOI

10.1109/ISSPIT.2012.6621288

Filename

6621288