DocumentCode
641349
Title
Understanding the impact of diode parameters on sneak current in 1Diode 1ReRAM crossbar architectures
Author
Yibo Li ; Long, Brenda ; Mandal, Srimanta ; Wenbo Chen ; Jha, R.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Univ. of Toledo, Toledo, OH, USA
fYear
2013
fDate
15-17 July 2013
Firstpage
64
Lastpage
69
Abstract
This paper discusses the impact of the bidirectional diode parameters on the read failures in 1ReRAM 1Diode (1D1R) crossbar array memory architectures. Our studies show that while a diode is integral for the successful read operation, the maximum achievable crossbar memory capacity is a strong function of the reverse saturation current of the diode. An acceptable reverse saturation current target for diodes should be 0.1 A/cm2 for 10 nm × 10 nm ReRAM cell for high density memory. For multi-level-cell (MLC) operation, read failure for multiple high resistance states is limited by the reverse saturation current of diode while the line resistance of crossbar arrays plays significant role for read failure of multiple low resistance states.
Keywords
random-access storage; semiconductor diodes; 1ReRAM 1Diode crossbar array memory architectures; bidirectional diode parameters; line resistance; multilevel-cell operation; read failures; resistance states; resistive random access memory; reverse saturation current; sneak current; Arrays; Market research; Microprocessors; Nonvolatile memory; Resistance; Threshold voltage; 1D1R CBA; CBA line resistance; ReRAM; diode reverse saturation current; sneak current;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanoscale Architectures (NANOARCH), 2013 IEEE/ACM International Symposium on
Conference_Location
Brooklyn, NY
Print_ISBN
978-1-4799-0873-8
Type
conf
DOI
10.1109/NanoArch.2013.6623046
Filename
6623046
Link To Document