Title :
A novel design of parallel and high-speed signal processor architecture for PD radar
Author :
Yuan Changshun ; Wang Jun ; Bi Yanxian ; Zhang Yuxian
Author_Institution :
Sch. of Electron. & Inf. Eng., Beihang Univ., Beijing, China
Abstract :
In this paper, a kind of high speed and parallel hardware architecture is designed with one TMS320C6678 and one XC6VSX315T. This system is used for the pulsed Doppler radar. To map the algorithm effectively, pipeline optimization on system and instruction levels are adopted, and various factors are taken into consideration, such as system complexity, communication between the processors, bandwidth of output signal.
Keywords :
Doppler radar; digital signal processing chips; optimisation; parallel architectures; pipeline processing; radar computing; radar signal processing; TMS320C6678; XC6VSX315T; high speed hardware architecture; output signal bandwidth; parallel hardware architecture; pipeline optimization; processor communication; pulsed Doppler radar; system complexity; PD radar; high-speed; parallel architecture; pipeline optimization;
Conference_Titel :
Radar Conference 2013, IET International
Conference_Location :
Xi´an
Electronic_ISBN :
978-1-84919-603-1
DOI :
10.1049/cp.2013.0297
