DocumentCode
642810
Title
An efficient run-time encryption scheme for non-volatile main memory
Author
Xian Zhang ; Chao Zhang ; Guangyu Sun ; Jia Di ; Tao Zhang
Author_Institution
Peking Univ., Beijing, China
fYear
2013
fDate
Sept. 29 2013-Oct. 4 2013
Firstpage
1
Lastpage
10
Abstract
Emerging non-volatile memories (NVMs) have been considered as promising alternatives of DRAM for future main memory design. The NVM main memory has advantages of low standby power, high density, and good scalability. Its non-volatility, however, induces a security design challenge that data retained in memory after power-off need to be protected from malicious attacks. Although several approaches have been proposed to solve this problem through data encryption, they have some limitations such as high design complexity and non-trivial timing/energy overhead. Moreover, these techniques decrease the lifetime of NVM main memory due to extra write operations caused by encryption. In order to overcome these limitations, we propose an efficient PAD-XOR based encryption scheme in this work. A novel PAD generator based on a randomizer and several sub-PAD tables is introduced. With the PAD generator, our encryption scheme can provide run-time data protection to all data in NVM memory with low timing and power overhead. In addition, the encryption process can co-operate with wear-leveling of NVM to reduce design complexity. More important, our encryption technique has no impact on lifetime because no extra writes are incurred. Experimental results demonstrate that, compared to prior approaches, our design can achieve the same security strength with substantial lower overhead in respect of timing, energy consumption, and design complexity.
Keywords
DRAM chips; computational complexity; cryptography; integrated circuit design; DRAM; NVM memory; PAD generator; PAD-XOR based encryption scheme; data encryption; design complexity reduction; energy consumption; future main memory design; malicious attacks; nontrivial energy overhead; nontrivial timing overhead; nonvolatile main memory; run-time data protection; run-time encryption scheme; security strength; subPAD tables; Complexity theory; Encryption; Generators; Nonvolatile memory; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2013 International Conference on
Conference_Location
Montreal, QC
Type
conf
DOI
10.1109/CASES.2013.6662530
Filename
6662530
Link To Document