Title :
Frame forward mechanism of a real-time Ethernet
Author :
Shuai Ji ; Dong Jin ; Chengrui Zhang ; Tianliang Hu
Author_Institution :
Sch. of Mech. Eng., Shandong Univ., Jinan, China
Abstract :
A kind of high efficient frame forward mechanism in line topology real-time Ethernet is proposed in this paper. The control data and state data of the networked control system are separated into downstream and upstream frame respectively. The downstream frame that conveys control data from master node to slave nodes are processed in two parallel channels, the first channel is responsible for extracting its control data, and the other one is in charge of forwarding the frame. The upstream frame which conveys the sate data from slave nodes to master node are forwarded and modified on line. The delivery time can be greatly reduced with this mechanism, because the forward delay of each slave node is reduced. This method is implemented on Field Programmable Gate Array (FPGA) finally, and the experiment results shows that forward delay in nanoseconds order can be achieved with this mechanism.
Keywords :
control engineering computing; data analysis; delays; field programmable gate arrays; local area networks; network topology; networked control systems; FPGA; control data extraction; control data processing; delivery time; field programmable gate array; forward delay; frame forward mechanism; line topology; master node; networked control system; parallel channel; real-time Ethernet; slave node; Clocks; Delays; Field programmable gate arrays; Network topology; Protocols; Real-time systems; Topology; FPGA; Real-time Ethernet; delivery time; forward delay;
Conference_Titel :
Signal Processing, Communication and Computing (ICSPCC), 2013 IEEE International Conference on
Conference_Location :
KunMing
DOI :
10.1109/ICSPCC.2013.6663971