A HW/SW Co-design of Execution Migration for Shared-ISA Heterogeneous Chip Multiprocessors

Author

Hongwei Liu ; Bo Sang ; Jing Huang ; Ji Qiu ; Xiang Gao

Author_Institution

Key Lab. of Comput. Syst. & Archit., Beijing, China

fYear

2013

fDate

17-19 July 2013

Firstpage

23

Lastpage

30

Abstract

Heterogeneous multi-core processors have strong potential for performance improvement, energy efficiency and area efficiency, compared to the homogeneous multi-core processors. The present methods of execution migration for heterogeneous multi-core processor suffer in efficiency, cost, compatibility, or programmability. In this paper, we propose a HW/SW code sign migration method based on binary-instrumentation. Our method takes full advantage of the shared-ISA. It enhances the performance of heterogeneous chip multiprocessor with low HW/SW cost. And it´s not required to modify source codes or compile system. The experiment results show that the efficiency of our method is 3.29 times of kernel simulation.

Keywords

hardware-software codesign; instruction sets; multiprocessing systems; HW/SW co-design migration method; binary-instrumentation; execution migration; hardware-software co-design; heterogeneous multicore processor; kernel simulation; low HW/SW cost; shared-ISA heterogeneous chip multiprocessors; Context; Instruments; Kernel; Multicore processing; Program processors; Registers; Switches; HW/SW co-design; binary instrumentation; execution migration; kernel simulation; shared-ISA heterogeneous chip multiprocessor;

fLanguage

English

Publisher

ieee

Conference_Titel

Networking, Architecture and Storage (NAS), 2013 IEEE Eighth International Conference on

Conference_Location

Xi´an

Type

conf

DOI

10.1109/NAS.2013.10

Filename

6665342