DocumentCode
644398
Title
SPC: An Approach to Guarantee Performance in Cost Oriented Mapping Algorithm for NoC Architectures
Author
Qinghua Wu ; Leibo Liu ; Shouyi Yin ; Yu Ren ; Shaojun Wei
Author_Institution
Nat. Lab. for Inf. Sci. & Technol., Tsinghua Univ., Beijing, China
fYear
2013
fDate
17-19 July 2013
Firstpage
187
Lastpage
190
Abstract
How to map IP cores onto NoC architectures is a significant issue (application mapping) in multi-core system design. Many mapping algorithms which aim at optimizing cost metrics(e.g. energy consumption) in the mapping procedure are proposed. Some of those algorithms consider satisfying performance metrics (e.g. latency) constraints. This paper analyses the mechanism leading to performance decreases and furthermore proposes a new approach SPC (satisfy processing capacity) to guarantee performance metrics for cost oriented application mapping algorithms. Using this approach in one of those algorithms, performance metrics constraints are well ensured and cost metrics are hardly affected. In fact, one random experiment shows that performance is enhanced at most 10% even if cost is reduced by 6%.
Keywords
multiprocessing systems; network-on-chip; performance evaluation; NoC architecture; SPC approach; application mapping; cost metrics optimization; cost oriented application mapping algorithms; energy consumption; latency constraints; mapping algorithms; multicore system design; network-on-chip; performance metrics; satisfy processing capacity; Algorithm design and analysis; Bandwidth; Energy consumption; Measurement; Routing; Switches; Throughput; Networks on chip (Noc); constraints; mapping; optimize; performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Networking, Architecture and Storage (NAS), 2013 IEEE Eighth International Conference on
Conference_Location
Xi´an
Type
conf
DOI
10.1109/NAS.2013.30
Filename
6665362
Link To Document