DocumentCode :
646639
Title :
Dynamically configurable online statistical flow feature extractor on FPGA
Author :
Da Tong ; Prasanna, Viktor
Author_Institution :
Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fYear :
2013
fDate :
10-12 Sept. 2013
Firstpage :
1
Lastpage :
6
Abstract :
Statistical information of network traffic flows is essential for many network management and security applications in the Internet and data centers. In this work, we propose an architecture for a dynamically configurable online statistical flow feature extractor on FPGA. The proposed architecture computes a set of widely used statistical features of the network traffic flows on-the-fly. We design an application specific data forwarding mechanism to handle data hazards without stalling the pipeline. We prove that our architecture can correctly process any sequence of packets. Users can dynamically configure the feature extractor through run-time parameter. The post place-and-route results on a state-of-the-art FPGA device show that the feature extractor can achieve a throughput of 96 Gbps for supporting 64 K concurrent flows.
Keywords :
field programmable gate arrays; pipeline processing; FPGA; application specific data forwarding mechanism; data hazards; dynamically configurable online statistical flow feature extractor; network traffic flows; Clocks; Computer architecture; Feature extraction; Hazards; Indexes; Pipelines; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Extreme Computing Conference (HPEC), 2013 IEEE
Conference_Location :
Waltham, MA
Print_ISBN :
978-1-4799-1364-0
Type :
conf
DOI :
10.1109/HPEC.2013.6670346
Filename :
6670346
Link To Document :
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