• DocumentCode
    646711
  • Title

    Improve signal integrity performance by using hybrid PCB stackup

  • Author

    Mendez Ruiz, Cesar ; Chunfei Ye ; Xiaoning Ye ; Lopez, Enrique ; Maoxin Yin ; Hsu, John ; Su, Tao

  • Author_Institution
    Intel Tecnol. de Mexico SA de CV, Tlaquepaque, Mexico
  • fYear
    2013
  • fDate
    5-9 Aug. 2013
  • Firstpage
    317
  • Lastpage
    321
  • Abstract
    FR4 is a commonly used material in industry to build printed circuit boards. However signals propagating in this media have significant attenuation when date rate gets higher and higher, gating the solution space. Low loss materials can be considered to enable longer board routing but they are very costly for most of commercial platforms. In this paper, hybrid PCB stackup is investigated. The investigation focuses on full channel signal integrity analysis. Simulations for SATA3 and PCIE3 show noticeable improvement of using this hybrid stackup. Such a hybrid is normally less costly than all low loss PCB stackup, thus achieving a good compromising between cost and performance for PCB design and manufacturing.
  • Keywords
    printed circuits; signal processing; PCIE3; SATA3; full channel signal integrity analysis; hybrid PCB stackup; signal integrity performance; Crosstalk; Dielectrics; Routing; Silicon; Stripline; Topology; PCIE; SATA; high speed signaling; low loss material; printed circuit board; signal integrity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electromagnetic Compatibility (EMC), 2013 IEEE International Symposium on
  • Conference_Location
    Denver, CO
  • ISSN
    2158-110X
  • Print_ISBN
    978-1-4799-0408-2
  • Type

    conf

  • DOI
    10.1109/ISEMC.2013.6670430
  • Filename
    6670430