A probabilistic approach for counterexample generation to aid design debugging

In today´s technology, verification and debugging have become important phases in the digital design process. In many of the prevailing debugging methods, counterexamples play an immense role. Hence generating fewer and more accurate counterexamples can aid in detecting additional bugs in a short run time. Today many approaches use Automatic Test Pattern Generation (ATPG) techniques to generate counterexamples for the purpose of debugging. This paper presents a highly accurate probabilistic method to generate fewer counterexamples at the gate level. The proposed method uses signal probability analysis to guide the counterexample generation process. Experimental results for ISCAS85 and ISCAS89 benchmarks show the effectiveness of our proposed method compared with the existing ATPG approaches.