• DocumentCode
    648538
  • Title

    Algorithm for automated custom network-on-chip topologies design

  • Author

    Bykov, S.O.

  • Author_Institution
    Dept. of Comput. Eng., Vladimir State Univ., Vladimir, Russia
  • fYear
    2013
  • fDate
    27-30 Sept. 2013
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    Network-on-chip (NoC) has been proposed as a solution to the communication challenges of System-on-chip (SoC) design in nanoscale technologies. Regular topologies are good for homogeneous systems, but in the general case it is better to design specific topology for effective use of chip resources. This paper describes automated custom Network-on-Chip topologies design.
  • Keywords
    integrated circuit design; network topology; network-on-chip; (NoC); SoC design; automated custom network-on-chip topology design; chip resources; communication challenges; homogeneous systems; nanoscale technologies; system-on-chip design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design & Test Symposium, 2013 East-West
  • Conference_Location
    Rostov-on-Don
  • Print_ISBN
    978-1-4799-2095-2
  • Type

    conf

  • DOI
    10.1109/EWDTS.2013.6673123
  • Filename
    6673123
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=648538