Title :
A design for testability technique for quantum reversible circuits
Author :
Mondal, Jayant ; Das, Debesh K. ; Kole, Dipak Kumar ; Rahaman, Hafizur
Author_Institution :
Dept. of Comput. Sci. & Eng., Jadavpur Univ., Kolkata, India
Abstract :
This paper shows that in a (n×n) reversible circuit implemented with k-CNOT gates, addition of only two extra input lines along with insertion of few k-CNOT gates can yield an easily testable design, which admits a universal test set of size (n+1) to detect all SMGFs, PMGFs, and detectable RGFs in the circuit.
Keywords :
design for testability; logic circuits; logic design; logic testing; quantum gates; PMGF; SMGF; design-for-testability technique; detectable RGF; k-CNOT gates; quantum reversible circuits; universal test set; Missing-gate fault; quantum computing; reversible logic; testable design; universal test set;
Conference_Titel :
Design & Test Symposium, 2013 East-West
Conference_Location :
Rostov-on-Don
Print_ISBN :
978-1-4799-2095-2
DOI :
10.1109/EWDTS.2013.6673147
