DocumentCode
648571
Title
Development of parameterized cell using Cadence Virtuoso
Author
Borisov, V.
Author_Institution
Dept. of Radiotechnical, Voronezh State Tech. Univ., Voronezh, Russia
fYear
2013
fDate
27-30 Sept. 2013
Firstpage
1
Lastpage
2
Abstract
This article describes a method of facilitating the process of designing circuits and systems by using CAD system Cadence Virtuoso. It also proposes a parameterized cell of the transistor. They are created by Cadence graphic menu Pcell. The use of a standard cell, in which the geometric parameters of elements can be set and changed when needed, makes the design of the elements and their application in bigger circuits faster and easier and allows much more flexibility.
Keywords
network synthesis; technology CAD (electronics); CAD system Cadence Virtuoso; circuit design; geometric parameters; graphic menu Pcell; parameterized cell development; standard cell;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium, 2013 East-West
Conference_Location
Rostov-on-Don
Print_ISBN
978-1-4799-2095-2
Type
conf
DOI
10.1109/EWDTS.2013.6673156
Filename
6673156
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