DocumentCode :
648580
Title :
Synthesis of qubit models for logic circuits
Author :
Gharibi, Wajeb ; Zaychenko, S.A. ; Dahiri, Farid ; Hahanova, Yu.V. ; Guz, O.A. ; Ngene, Christopher Umerah ; Stanley, Andrew Arthur
Author_Institution :
Jazan Univ., Jazan, Saudi Arabia
fYear :
2013
fDate :
27-30 Sept. 2013
Firstpage :
1
Lastpage :
7
Abstract :
Qubit (quantum) structures of data and computational processes for significantly improving performance when solving problems of discrete optimization and fault-tolerant design are proposed. We describe superpositional method for synthesizing cube of functionality for its implementation in the structural components of programmable logic chips. The estimates of synthesis time, as well as hardware costs for creating qubit models of logic circuits are represented.
Keywords :
logic circuits; logic design; discrete optimization; fault-tolerant design; functionality cube synthesis; logic circuits; programmable logic chips; quantum structures; qubit model; superpositional method; synthesis time estimation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design & Test Symposium, 2013 East-West
Conference_Location :
Rostov-on-Don
Print_ISBN :
978-1-4799-2095-2
Type :
conf
DOI :
10.1109/EWDTS.2013.6673165
Filename :
6673165
Link To Document :
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