Title :
Application of defect injection flow for fault validation in memories
Author :
Amirkhanyan, K. ; Davtyan, A. ; Harutyunyan, G. ; Melkumyan, T. ; Shoukourian, S. ; Vardanian, V. ; Zorian, Y.
Abstract :
In the paper, an advanced flow for defect injection in the memories and its application for fault validation are presented. Specifically, the results of injecting address decoder and process variation defects are illustrated. The defect injection flow gives a possibility to inject different types of defects (such as resistive opens, resistive shorts, process variation defects, etc.) in different blocks of the memory layout (memory array, address decoder, sense amplifier, etc.) and then verify if a given test algorithm detects the injected defect.
Keywords :
SRAM chips; fault tolerant computing; SRAM memory; address decoder; defect injection flow; fault validation; memory array; process variation defects; resistive opens; resistive shorts; sense amplifier; static random access memory; address decoder defects; defect injection; memory programming; process variation defects; test algorithm;
Conference_Titel :
Design & Test Symposium, 2013 East-West
Conference_Location :
Rostov-on-Don
Print_ISBN :
978-1-4799-2095-2
DOI :
10.1109/EWDTS.2013.6673197