DocumentCode
648647
Title
Table of contents
fYear
2013
fDate
7-9 Oct. 2013
Abstract
The following topics are dealt with: very large scale integration; VLSI-SoC; analog design; mixed-signal design; VLSI test; embedded system; logic synthesis; high level synthesis; transistor level digital VLSI circuit; memory; nanoscale logic fabrics; switches; reconfigurable system; adaptive system; FPGA; energy minimization; security; reliability; processor; NAND gates; SOC design; SOC interconnect; transistor level digital VLSI circuit; and silicon debug.
Keywords
VLSI; embedded systems; field programmable gate arrays; integrated circuit design; integrated circuit interconnections; logic gates; mixed analogue-digital integrated circuits; system-on-chip; FPGA; NAND gates; SOC design; SOC interconnect; VLSI test; VLSI-SoC; adaptive system; analog design; embedded system; energy minimization; high level synthesis; logic synthesis; memory; mixed-signal design; nanoscale logic fabrics; processor; reconfigurable system; reliability; security; silicon debug; switches; transistor level digital VLSI circuit; very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Very Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE 21st International Conference on
Conference_Location
Istanbul
Type
conf
DOI
10.1109/VLSI-SoC.2013.6673234
Filename
6673234
Link To Document