A debugging method for gate level circuit designs by introducing programmability

As the verification and debugging of complicated VLSI designs are dominating the chip development time, automated debugging becomes more and more important. In this paper, we propose a method to correct buggy gate-level designs by introducing programmable circuits, such as look up table (LUT) and multiplexer (MUX), that are inserted in order to formulate the debugging processes mathematically. We first replace sets of gates with programmable circuits and try to find a configuration for correction. Some bugs, however, cannot be fixed with only the replacement. In such cases, we add another input to a LUT, where the selection of such additional input is a key for effective debugging. We introduce a necessary condition by which many unusable signals as input to the LUTs can be efficiently eliminated. The experimental results on industrial designs having real bugs show that our proposed method can automatically correct the designs.