DocumentCode
648680
Title
Characterization of mode transition timing overhead for net energy savings in low-noise MTCMOS circuits
Author
Hailong Jiao ; Kursun, V.
Author_Institution
Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China
fYear
2013
fDate
7-9 Oct. 2013
Firstpage
150
Lastpage
155
Abstract
Multi-threshold CMOS (MTCMOS) is commonly utilized for suppressing leakage currents in idle integrated circuits. The deactivation/reactivation energy consumption however degrades the effectiveness of MTCMOS technique for providing significant savings in total energy consumption in CMOS integrated circuits. The mode transition energy overheads of various recently published low-noise ground-gated MTCMOS circuits are characterized in this paper. With a digital triple-phase sleep signal slew rate modulated MTCMOS circuit, the overall mode transition energy consumption is reduced by up to 45.31% as compared to the other MTCMOS circuits that are evaluated in this paper in a UMC 80nm CMOS technology. Furthermore, the digital triple-phase MTCMOS circuit shortens the mode transition timing overhead by up to 65.26% as compared with the other MTCMOS circuits that are evaluated in this paper.
Keywords
CMOS digital integrated circuits; leakage currents; CMOS integrated circuits; UMC CMOS technology; deactivation-reactivation energy consumption; digital triple-phase sleep signal slew rate modulated MTCMOS circuit; idle integrated circuits; leakage current suppression; low-noise MTCMOS circuits; low-noise ground-gated MTCMOS circuits; mode transition energy consumption; mode transition energy overheads; mode transition timing overhead characterization; net energy savings; size 80 nm;
fLanguage
English
Publisher
ieee
Conference_Titel
Very Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE 21st International Conference on
Conference_Location
Istanbul
Type
conf
DOI
10.1109/VLSI-SoC.2013.6673267
Filename
6673267
Link To Document