Variability robustness enhancement for 7nm FinFET 3T1D-DRAM cells

3T1D-DRAM cells will still be operative with 7nm FinFETs but their performance is significantly degraded when factoring in variability. In order to improve the cell robustness against device process variation and high environment temperatures, we propose a Dual-V_T strategy. Our results show a larger retention time, significant cell spread reduction and reliable behavior up to 100°C.