A low power CMOS integrated circuit for differential capacitive measurement

A low power circuit topology for interfacing differential capacitive microsensors is presented. The topology is based on sampling and comparing the difference between the charges stored on the transducer elements. The topology is remarkably compact and low-power due to the heavy reliance on switches rather than analog blocks. Additionally, the circuit offers a high dynamic range, making it suitable for many capacitive interfacing applications. The dynamic range and sensitivity of the circuit can further be adjusted by modifying a single capacitor value. The proposed topology has been designed and fabricated in a standard 0.35μm CMOS technology from AMS. The implemented circuit included the clock generation and output buffers in addition to the switching circuitry. The core circuit dissipates 40μW when biased with ±1.65V supply voltages. Measurement results show that the circuit can achieve 1.5 V/pF differential sensitivity with a total sensing capacitance of 170 fF.