A very high energy-efficiency switching technique for SAR ADCs

A high energy-efficiency capacitor switching scheme for a successive approximation register (SAR) analog-to-digital converter (ADC) is presented in this paper. The proposed switching technique achieves a zero energy dissipation in the first 2 comparison cycles and a 4X reduction in total capacitance used in the digital-to-analog converter (DAC), i.e., for the same total capacitance, the proposed technique can produce 2 additional bits of resolution than a conventional SAR. The proposed method can achieve 95% savings in switching energy over a conventional SAR. The result has been verified through behavioral simulations.