Title :
A 13-bit 200MS/s PIPELINE ADC in 0.13µm CMOS
Author :
Junfeng Gao ; Bo Chen ; Guangjun Li ; Qiang Li
Author_Institution :
Centre for Commun. Circuits & Syst., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
This paper presents a 0.13μm SHA-less pipeline ADC with LMS calibration technique. The nonlinearity of the first three stages is calibrated with blind LMS algorithm. Opamps and switches are carefully considered and co-designed with the calibration system. Around 7LSB closed-loop nonlinearity of MDAC is achieved. Simulation shows the SNDR of the proposed ADC at 200MS/s sampling rate is 78dB with 3.13MHz input and 75dB with 83.13MHz input.
Keywords :
CMOS analogue integrated circuits; analogue-digital conversion; calibration; closed loop systems; least mean squares methods; operational amplifiers; sample and hold circuits; switches; CMOS; LMS calibration; SHA-less pipeline ADC; blind LMS algorithm; closed-loop nonlinearity; opamps; sample-and-hold amplifier; size 0.13 mum; switches; word length 13 bit; LMS; digital calibration; linearity; op-amp; pipeline ADC;
Conference_Titel :
Circuits and Systems (MWSCAS), 2013 IEEE 56th International Midwest Symposium on
Conference_Location :
Columbus, OH
DOI :
10.1109/MWSCAS.2013.6674632
