Low-cost parallel FFT processors with conflict-free ROM-based twiddle factor generator for DVB-T2 applications

This paper presents a conflict-free ROM addressing scheme for generating the TF tables. Basically, the conventional (N/2)-words ROM table for the Radix-2 Memory-Based FFT (MBFFT) processor with single process element (PE) is equally partitioned into 2^p sub-tables allowing all 2^p PEs to simultaneously access the twiddle factors without causing any conflict. This study presents the use of MBFFT processor with 4 parallel PEs. Result show that the proposed scheme can reduce the chip area of DVB-T2 applications by 18.85%. The hardware reduction is of significance.