SAT-based reversible gate/wire replacement fault testing

Recently reversible circuit testing has become an important issue for researchers. In the process of design, synthesis or template matching, failures can happen due to erroneous replacements or incorrect cascading of gates. In this paper, we present testing such errors modeled as gate and wire replacement faults, which can also handle most frequently addressed errors like missing gate and control points appearance or disappearance. Here, we propose three testing schemes based on Boolean Satisfiability (SAT) formulation and compare their efficiencies. In particular, we present the design of a Reversible Test Miter, which, along with backtracking, can easily detect such faults. We show that a smaller test set can be derived from the reversible test miter, increasing fault coverage and speed of testing.