DocumentCode :
649424
Title :
A comparison of Phase Locked Loop and FIFO Locked Loop
Author :
Bassan, Fabio Renato ; Akira Nakandakare, Cleber ; de Barros, Luis Paulo F. ; Rocha Pereira, Fernando ; Salvador, Arley
Author_Institution :
CPqd R&D in Telecommun., Campinas, Brazil
fYear :
2013
fDate :
4-7 Aug. 2013
Firstpage :
1314
Lastpage :
1317
Abstract :
In this paper we present a comparison of two methods to control the reading frequency of a First In First Out (FIFO) memory. The first method is based on the monitoring of its filling level and the other uses the synthesis of the writing frequency to generate and control the reading frequency. These control systems are used in data communication protocol justification architecture for tributary signal demapping.
Keywords :
frequency control; optical communication equipment; phase locked loops; transport protocols; FIFO locked loop; FIFO reading frequency; data communication protocol justification architecture; first in first out memory; phase locked loop; tributary signal demapping; writing frequency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2013 IEEE 56th International Midwest Symposium on
Conference_Location :
Columbus, OH
ISSN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2013.6674897
Filename :
6674897
Link To Document :
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