DocumentCode :
649944
Title :
Design and implementation of nine levels for H-Bridge inverter using FPGA
Author :
Maheswari, V. ; Manikandan, M.
Author_Institution :
St. Peter´s Univ., Chennai, India
fYear :
2013
fDate :
3-3 July 2013
Firstpage :
315
Lastpage :
318
Abstract :
In this paper, a FPGA Based sine wave pulses are created and their Resource Utilization summary is verified, so that the Produced design is so effective, in making the H-Bridge Converter less volume, and their FPGA summary is included. The Device used here Spartan-3, XC3S50-5PQ208.and their results such as AREA, LUT and Delay are included.
Keywords :
bridge circuits; field programmable gate arrays; invertors; FPGA; H-bridge converter; H-bridge inverter; Spartan-3; XC3S50-5PQ208; resource utilization; sine wave pulses; FPGA; HDL; Sine wave;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Current Trends in Engineering and Technology (ICCTET), 2013 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-2583-4
Type :
conf
DOI :
10.1109/ICCTET.2013.6675974
Filename :
6675974
Link To Document :
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