• DocumentCode
    650039
  • Title

    Realization of the nullor using two CMOS CCII+s

  • Author

    Moro-Frias, David ; Tlelo-Cuautle, E.

  • Author_Institution
    INAOE, Puebla, Mexico
  • fYear
    2013
  • fDate
    Sept. 30 2013-Oct. 4 2013
  • Firstpage
    463
  • Lastpage
    466
  • Abstract
    The nullor element is implemented herein by using two positive-type second generation current conveyors (CCII+s). The CCII+s are designed using standard CMOS integrated circuit technology of 0.35μm. The main advantage is the very low parasitic resistance of the CCII+ at terminal X (RX), in order to accomplish the ideal behavior of the nullor. HSPICE simulation results are provided and the usefulness of the designed nullor is highlighted through the implementation of a current-mode universal filter and a sinusoidal oscillator.
  • Keywords
    CMOS integrated circuits; current conveyors; current-mode circuits; oscillators; CMOS CCII+s; HSPICE simulation; current-mode universal filter; nullor element; parasitic resistance; positive-type second generation current conveyors; sinusoidal oscillator; size 0.35 mum; standard CMOS integrated circuit technology; terminal X; Current Conveyor; Nullor; current-mode filter; parasitic resistance RX; sinusoidal oscillator;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Engineering, Computing Science and Automatic Control (CCE), 2013 10th International Conference on
  • Conference_Location
    Mexico City
  • Print_ISBN
    978-1-4799-1460-9
  • Type

    conf

  • DOI
    10.1109/ICEEE.2013.6676070
  • Filename
    6676070
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=650039