Analysis of charges densities in multiple-gates SOI nMOS junctionless

This paper aims to analyze the charges density in multiple gates junctionless devices with different dimensions.. The analysis of the charge densities was done at the center of the silicon film, at the sidewall and at the top interfaces between the silicon and the gate oxide, for devices with different fin width, height and gate oxide tickness. Based on this analisys, the occurrence of corner effects in Junctionless devices is investigated.