Analysis of border traps in high-к gate dielectrics on high-mobility channels

This paper gives an overview of measurement techniques to assess border traps in high-k gate dielectrics deposited on high-mobility channel materials, like Ge and InGaAs. A short description of the measurement principle and bulk oxide trap analysis will be provided for three methods, namely, low-frequency (1/f) noise, Deep-Level Transient Spectroscopy and AC transconductance dispersion. Practical application is illustrated either on metal-oxide-semiconductor capacitors or transistors, depending on the technique.