DocumentCode
65041
Title
Implementation of Film Profile Engineering in the Fabrication of ZnO Thin-Film Transistors
Author
Rong-Jhe Lyu ; Horng-Chih Lin ; Tiao-Yuan Huang
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
61
Issue
5
fYear
2014
fDate
May-14
Firstpage
1417
Lastpage
1422
Abstract
A novel approach, which can delicately form a desirable film profile for deposited gate oxide, channel, and source/drain contacts of oxide-based thin-film transistors (TFTs) is proposed. To demonstrate the film-profile engineering concept used in this approach, a simple one-mask process was developed for fabricating ZnO TFTs with submicrometer channel length. The fabrication takes advantage of a suspended bridge hanging across the device to tailor the desirable profile of deposited films with proper tools. The fabricated devices show high ON/OFF current ratio (>109), steep subthreshold swing (71-187 mV/decade), and high mobility (21-45 cm2/V·s). Very small variation in device characteristics among the devices with the same channel dimensions is also confirmed.
Keywords
II-VI semiconductors; masks; thin film transistors; wide band gap semiconductors; zinc compounds; ON-OFF current ratio; ZnO; channel dimensions; deposited gate oxide; device characteristics; film profile engineering; one-mask process; source-drain contacts; steep subthreshold swing; submicrometer channel length; suspended bridge; thin-film transistor fabrication; Bridge circuits; Bridges; Fabrication; Logic gates; Thin film transistors; Zinc oxide; Film profile engineering (FPE); ZnO; metal oxide; thin-film transistors (TFTs);
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2014.2313344
Filename
6783733
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