Cost effective hardware based demosaicking algorithm for embedded system

With the growing need of the high quality image captured by the camera in smartphones and other portable equipment, it is necessary to implement the demosaicking algorithm hardcore into the embedded system to balance the tradeoff between the power and performance. However, current demosaicking algorithms either produce poor image quality due to their focus on low cost hardware, or are too complex to be implemented into the embedded system. In this paper, we propose a cost effective demosaicking algorithm based on edge-orientation map and realize the algorithm in hardware. The proposed algorithm can reduce great hardware cost by adjusting the interpolation flow and simplifying the topology of edge-orientation map. The algorithm has been verified to be high performance by subjective measurement and color peak signal to noise ratio (CPSNR) and has been implemented in Altera FPGA with greatly reduced resources and a real time speed of 200MHz.