DocumentCode :
65183
Title :
915-MHz FSK/OOK Wireless Neural Recording SoC With 64 Mixed-Signal FIR Filters
Author :
Abdelhalim, Karim ; Kokarovtseva, Larysa ; Perez Velazquez, Jose Luis ; Genov, Roman
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada
Volume :
48
Issue :
10
fYear :
2013
fDate :
Oct. 2013
Firstpage :
2478
Lastpage :
2493
Abstract :
A system-on-chip (SoC) neural recording interface with 64 channels, 64 16-tap programmable mixed-signal FIR filters and a fully integrated 915 MHz OOK/FSK PLL-based wireless transmitter is presented. Each recording channel has a fully differential amplifier with 54 dB gain and utilizes a tunable low-distortion subthreshold MOS-resistor to reject DC offsets with an input-referred noise of 6.5 μV and a CMRR of 75 dB. Each channel contains a modified 8-bit SAR ADC with an ENOB of 7.8-bits and can provide analog-digital multiplication by modifying the the sampling phase of the ADC. It is used in conjunction with 12-bit digital adders and registers to implement 64 programmable transposed FIR filters. The 915 MHz FSK/OOK transmitter offers data rates up to 1.5 Mbps and a maximum output power of 0 dBm. The 4×3 mm2 chip fabricated in a 0.13 μm CMOS process dissipates 5.03 mW from a 1.2 V supply. Experimental measurements characterize the electrical performance of the wireless SoC. In vivo measurement results from freely moving rats are also presented.
Keywords :
CMOS logic circuits; FIR filters; MOSFET; UHF amplifiers; UHF filters; UHF integrated circuits; adders; amplitude shift keying; analogue-digital conversion; circuit tuning; differential amplifiers; frequency shift keying; integrated circuit measurement; integrated circuit noise; mixed analogue-digital integrated circuits; phase locked loops; programmable filters; radio transmitters; resistors; system-on-chip; 16-tap programmable mixed-signal FIR filter; CMOS process; DC offset rejection; ENOB; FSK-OOK wireless neural recording SoC interface; In vivo measurement; OOK-FSK PLL-based wireless transmitter; SAR ADC; analog-digital multiplication; channel recording; digital adder; freely moving rat; frequency 915 MHz; fully differential amplifier; gain 54 dB; gain 75 dB; input-referred noise; low-distortion subthreshold MOS-resistor; power 5.03 mW; programmable transposed FIR filter; sampling phase modification; system-on-chip; voltage 1.2 V; voltage 6.5 muV; word length 12 bit; word length 7.8 bit; word length 8 bit; Finite impulse response filters; Frequency shift keying; Power dissipation; System-on-chip; Transmitters; Wireless communication; Extracellular recording; implantable wireless SoC; mixed-signal FIR filters; multi-channel neural recording; neural recording SoC;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2013.2272849
Filename :
6572877
Link To Document :
بازگشت